This invention relates in general to the field of electronic device processing and more particularly to an improved system and method for electroplating fine geometries in integrated devices.
The ability to create complex integrated electronic devices at reasonable cost is directly related to the ability to create finer and finer geometries on the integrated systems. As some features get smaller, their capacity to carry the current necessary for the operation of these devices is reduced. As such, device designers have turned to more exotic materials within these integrated structures. For example, interconnect and interlevel vias are now constructed from copper which is a much more difficult material with which to work than prior conductive materials.
Copper is difficult to deposit on a surface of a device being constructed without supplying electroplating current. Copper films typically grow in a granular manner. Accordingly, the uniformity of the film depends on the uniformity of the grain size of the copper layer. Inflection points within fine geometries as well as impurities on the outer surface of the device being coated can contribute to non-uniformity in grain sizes. This is especially applicable to the growth of copper films but is also relevant to a variety of other materials used in integrated device processing.
A variety of techniques during the electroplating process have been used to contribute to the creation of uniform layers. Although techniques such as the utilization of variable currents in the plating process and occasional deplating during the electroplating process have proved somewhat successful, they have failed to address the non-uniformities due to inflections within the ever finer geometries of modern integrated systems.
Accordingly, a need has arisen for a system and method for electroplating integrated electronic devices that provides more uniform grain size even with device geometries having fine features and inflexion points.
In accordance with the teachings of the present invention a system and method of electroplating electronic devices is described that substantially eliminates or reduces problems associated with prior techniques and systems.
According to one embodiment of the present invention, a method for forming a conductive layer on an outer surface of an integrated electronic device is disclosed which comprises providing an electric current through a solution of conductive material and onto the surface of the device to be plated. The electric current can be varied in a smooth fashion to eliminate transient electric fields which can contribute to the irregular formation of grains within the conductive film. The process can include periodic deplating steps which will contribute to the uniformity of the resulting conductive film. Other specific embodiments of the present invention can include systems to vary the rate of rotation of the electronic device within the liquid solution containing the conductive material to further contribute to the uniformity of the conductive film formed through the electroplating process.
An important technical advantage of the present invention inheres in the fact that the variable current electroplating process of the present invention uses smooth transitions to prevent sudden changes in the electric field which can result in the formation of non-uniform conductive grains on the surface being electroplated. A further technical advantage of certain embodiments of the present invention is that the use of periodic deplating steps within the electroplating process can help reduce or remove any large grains which have inadvertently formed near imperfections or inflexions within the geometries to be deplated.